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RTL design and verification
RTL
From specification to RTL design, simulation and on-hardware verification.
SELECT LANGUAGE — 16 LOCALES
Positive ONE offers FPGA design services from specification, RTL design, simulation and on-hardware verification to IP core integration and the firmware and drivers around the FPGA — including industrial Ethernet (HSR/PRP, TSN).
SCOPE
RTL → IP → BOARD
01
RTL
From specification to RTL design, simulation and on-hardware verification.
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IP CORES
Imaging and networking IP cores, including industrial Ethernet IP for HSR/PRP, TSN and PTP time synchronization.
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MODULES
Shorter development using FPGA modules and FMC cards with AMD (Xilinx) Zynq, Artix and more.
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FIRMWARE
Firmware, BSPs and device drivers working with the FPGA.
EVIDENCE
| Product / project | Key specifications (as announced) | Our role | Released |
|---|---|---|---|
| SMARTix Module FPGA module | AMD Artix-7 (XC7A35T to XC7A100T), up to 6× 10/100 Ethernet PHY (copper or fiber), HSR/PRP/RSTP, PTP time synchronization, −40 to 55 °C | Sales and technical support for integration and development | 2025.01.23 |
| SMARTmpsoc FPGA module | AMD Zynq UltraScale+ MPSoC (ZU3CG / ZU3EG), up to 5× GbE PHY, HSR/PRP, IEEE 1588 PTP and TSN endpoints (SoC-e IP), TPM 2.0 | Product announcement | 2025.01.21 |
| FMC-DR2 drive-control FMC card | FMC (LPC), 6 half-bridges (9 A each, up to 18 A at 42 V), PWM up to about 200 kHz, 3× DC / 2× BLDC / 1× stepper motor, encoder / Hall inputs, CAN; used with Enclustra Mercury+ PE1, Mars PM3 and others | Reference designs, configuration guides and technical assistance | 2025.11.11 |
| 10G MTSN switch IP core | For Zynq UltraScale+ MPSoC; FE / GbE / 2.5G / 5G / 10G; IEEE 802.1AS, Qbv, Qbu, Qav, CB, Qci, Q-2018 | Distribution in Japan (SoC-e) | 2021.10.05 |
BEFORE YOU CONTACT US
PROCESS
STEP 1
Consult & scope
Hearing of goals & constraints
STEP 2
Spec & quote
Design policy & scope fixed
STEP 3
Design & build
HW / SW / FPGA implementation
STEP 4
Verify & certify
Validation & compliance support
STEP 5
Produce & support
Mass production & ongoing support
WHY POSITIVE ONE
W1
SINCE 2004
Head office in Shibuya and an office in Tama, Tokyo, plus an R&D center in Ho Chi Minh City — over 20 years in embedded development.
W2
TRACK RECORD
62+ key clients and institutions across automotive, semiconductors and electronics, telecom and public research.
W3
ENGINEERING × TRADING
Long-term supply and technical support for products from global vendors, also available through 11 major Japanese distributors.
FAQ
Specification, RTL design, simulation, on-hardware verification, IP core integration, and the firmware, BSPs and device drivers that work with the FPGA.
Yes. We handle imaging and networking IP cores, including industrial Ethernet IP for HSR/PRP, TSN and PTP time synchronization.
We use FPGA modules and FMC cards with AMD (Xilinx) Zynq, Artix and other devices to shorten development, and you can consult us from the FPGA selection stage.
Whatever you know of the items listed under “What to tell us before a consultation or quotation” is enough to start. You can contact us before the FPGA has been selected.